Applied Materials Announces First Process Sequence Integration Product: The Copper Interconnect ESS
Multi-Level Metal Copper Interconnect Module Reduces Chipmakers'
Development and Engineering Time to Enable Faster
Time-to-Market for High Speed Copper Devices
Applied Materials, Inc. today introduced its Copper Interconnect Equipment Set Solution (ESS), the semiconductor industry's first fully integrated and electrically characterized process module for fabricating a complete multi-level metal copper interconnect structure. This unprecedented new product can be demonstrated, tested and pre-qualified by customers at Applied Materials' new Equipment and Process Integration Center (EPIC), which opened today in Santa Clara, Calif.
The Copper Interconnect ESS combines Applied Materials' systems and process technologies with the company's extensive integration expertise to offer customers a fast, low risk, economic way to introduce a copper interconnect process flow into their manufacturing lines. The module is offered with a complete set of guarantees that specify defect levels, operating cost, productivity and electrical performance.
"Offering integrated process modules represents a major shift in the business paradigm the industry has followed for the past thirty years, and will ultimately change the way equipment suppliers work with their customers," said Tom St. Dennis, corporate group vice president of Applied Materials. "The significance of this first product from our Process Sequence Integration Division lies in our ability to offer chipmakers a smooth transition to copper-based technology in their fabs. This is a major step toward becoming full development partners with our customers and playing a larger role in enabling their business success."
"No other company in this industry has ever created the technology depth that enables this historic shift from stand-alone systems to integrated process modules," said Dr. Ashok Sinha, president of Applied Materials' Metal Deposition Product Business Group. "The Copper Interconnect ESS is a significant achievement for Applied Materials that capitalizes on our exceptional strength in process technologies and integration know-how to provide Total Solutions to our customers."
Process Sequence Integration (PSI) is the complex, time-consuming procedure that chipmakers use to make sure each step in the process flow works with the ones before and after it. A typical manufacturing process involves numerous sequential steps, with the integration phase often taking many months of testing and requiring tremendous engineering resources.
"With the Copper Interconnect ESS, customers can immediately implement an entire copper process with an off-the-shelf, optimized sequential process flow as a basis to build their own device designs. Our EPIC facility will enable full evaluation of customers' devices, potentially saving significant time in manufacturing development and fab startup as well as shortening their products' time to market," said Dr. Sinha. "To prove manufacturability, we've run thousands of wafers on our individual systems, as well as more than a thousand wafers through our Copper Interconnect ESS."
Applied Materials' Copper Interconnect Module features the following advanced technologies and services:
-- A breakthrough low (kappa) dielectric film technology, currently
in an advanced stage of customer testing, is deposited using the
company's Centura platform.
-- The Dielectric Etch IPS(tm) Centura(R) etches the low (kappa)
dielectric layer to form the interconnect vias and trenches.
-- The 7830Si CD-SEM (critical dimension- scanning electron
microscope) measures dimensional accuracy of the design across
the wafer after etching.
-- The Endura(R) Electra Cu(tm) system performs a reactive preclean
and then deposits the tantalum-based barrier layers and the
copper seed layer using proprietary ion metal plasma (IMP)
physical vapor deposition (PVD) technology.
-- Applied Materials' unique Electroplating technology follows
barrier/seed layer deposition to fill the structure with bulk
copper material.
-- The Mirra(R) CMP (chemical mechanical polishing) system removes
copper and barrier metal from the top of the dielectric film.
-- Applied Materials' Low Temperature Annealing technology
stabilizes the deposited copper and, in some cases, the low
(kappa) dielectric.
-- The WF736 DUO defect detection system inspects the film layers
after dielectric deposition, dielectric etch, copper deposition
and copper CMP.
-- The SEMVision(tm) defect review scanning electron microscope
identifies and automatically classifies defects after detection.
-- Test chips designed for specific technologies are used for two-
to five-level metal designs.
-- A mask set for the test chip is used with specified lithographic
tools.
-- The Process Sequence Integration Division's guaranteed startup
and implementation support package performs module startup at the
customers' location.
The Copper Interconnect Module is expected to be available for delivery beginning the second fiscal quarter of 1999.
Applied Materials, Inc. is a Fortune 500 global growth company and the world's largest supplier of wafer fabrication systems and services to the global semiconductor industry. Applied Materials is traded on the Nasdaq National Market System under the symbol "AMAT." Applied Materials' web site is http://www.AppliedMaterials.com.